:: Re: [DNG] Purism Librem and disabli…
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Author: Enrico Weigelt, metux IT consult
Date:  
To: dng
Subject: Re: [DNG] Purism Librem and disabling Intel ME: it can be done [ Re: TALOS 2 - The Libre Owner Controlled POWER9 Workstation/Server ]
On 08.09.2017 09:53, Erik Christiansen wrote:

> No, one of the variety of CPUs implemented on FPGAs, so not so curious
> at all. Some FPGAs contain RAM areas, improving the gate efficiency of
> e.g. a CPU implementation.


No, that's just boring ;-)

I'm thinking of generating VHDL from fw rules and synthesize that into
an FPGA.

OTOH, for such applications we could also think about different
computer architectures (maybe transputers, etc)

--

mit freundlichen Grüßen
--
Enrico, Sohn von Wilfried, a.d.F. Weigelt,
metux IT consulting
+49-151-27565287