:: Re: [DNG] Purism Librem and disabli…
Góra strony
Delete this message
Reply to this message
Autor: Enrico Weigelt, metux IT consult
Data:  
Dla: dng
Temat: Re: [DNG] Purism Librem and disabling Intel ME: it can be done [ Re: TALOS 2 - The Libre Owner Controlled POWER9 Workstation/Server ]
On 07.09.2017 16:12, Erik Christiansen wrote:

> If the firewall is on a FPGA, then we know what every gate is doing, as
> we have the VHDL source for it.


An purely FPGA-based firewall (w/o an cpu in it), specifically
synthesized for a given ruleset seems an very interesting approach.

Anyone here w/ some practical vhdl experience ?


--mtx